Tuesday, December 14, 2010

Google products I am using


What's the next ...

Friday, December 10, 2010

Draw model geometry by running COMSOL with Matlab

By running COMSOL with Matlab, one can create geometry objects with COMSOL script. The introduction to corresponding functions is in the documentation "COMSOL Multiphysics MATLAB Interface Guide". Once the operations are done in Matlab, geometry objects in Matlab workspace will appear in COMSOL geometry objects import dialog box. Then they are ready to be imported into COMSOL.

Tuesday, December 7, 2010

Techniques for Improving Performance of Matlab programs

Check the section "Techniques for Improving Performance" in Chapter 8 of MATLAB® 7 Programming Fundamentals.

The documentation is on MathWorks website, and can be downloaded at http://www.mathworks.com/help/pdf_doc/matlab/matlab_prog.pdf.

Sunday, December 5, 2010

IBM debuts CMOS silicon nanophotonics


IBM debuts CMOS silicon nanophotonics

R. Colin Johnson

11/30/2010 8:01 PM EST

PORTLAND, Ore.—Silicon chips will be communicating with pulses of light instead of electrical charge starting in 2011, according to International Business Machines Corp., which described its CMOS Integrated Silicon Nanophotonics (CISN) technology Wednesday (Dec. 1) at a tradeshow.

At Semicon Japan in Chiba, Japan, IBM (Armonk, N.Y.) heralded silicon nanophotonics as the enabler for future exascale processors that can execute a million trillion operations per second (1,000-times faster than today's petascale supercomputers).

"The CMOS silicon nanophotonics technology we have developed at IBM can meet the requirements for exascale systems, by scaling up per-chip transceiver bandwidth and integration density," said Will Green, an IBM researcher involved with the CISN project. Green worked on CISN with Yurii Vlasov, manager of silicon integrated nanophotonics at its T.J Watson Research Center in Yorktown Heights, N.Y., and fellow researchers Solomon Assefa, Alexander Rylakov, Clint Schow and Folkert Horst.

For nearly a decade, IBM, Hewlett-Packard Co., Intel Corp., Freescale Semiconductor Inc., NEC Electronics Corp., Samsung Electronics Co. Ltd., IMEC and dozens of their partners—from Avago Technologies Ltd. to Luxtera Inc.—have promised silicon photonics as the inevitable future of CMOS. By integrating electrical-to-optical and optical-to-electrical transceivers onto traditional CMOS chips, silicon photonics promises to break the bottleneck now holding back development of exascale computing platforms. IBM now claims to have solved this problem with its CISN technology which is currently being licensing to partners, and which will begin to appear in commercial transceivers starting in 2011.

"The situation is similar to when Marconi demonstrated the first transatlantic radio transmission," said Rick Doherty, principal analyst at The Envisioneering Group (Seaford, N.Y.). "Today there are oceans separating our digital systems, boards and chips, but now IBM has proven that optical interconnects can crossover those oceans using traditional, integrated CMOS lithography."

IBM's all silicon optical transceivers house modulators, wave guides, wavelength-division multiplexers, switches and detectors all cast the same CMOS die.

Since 2005, IBM Research has been assembling the silicon photonic components needed to create the entire ecosystem of CMOS optical connectivity required to enable electronic chips to communicate with light over optical interconnects instead of copper traces and busses. So far, IBM has demonstrated optical modulators, wave guides, wavelength-division multiplexers, switches and detectors—all cast in CMOS. The remaining component—a silicon emitter—was also demonstrated at IBM by adding a nanotube, but IBM's integrated silicon photonics due out next year will instead use a traditional III-V emitter.

One major stumbling block recently removed by IBM for its CISN technology was the ability to bury a germanium layer at the bottom of its CMOS stack. Others like Freescale, working with startup Luxtera, have demonstrated silicon optical transceivers using that use a germanium-last process, but IBM claims its germanium-first process enables a 10-to-1 reduction in die size, enabling 65-nanometer CMOS chips to house silicon optical transceivers in just a half a square millimeter (which can be ganged together for terabit-per-second speeds in less than five-by-five millimeters).

IBM is currently characterizing the manufacturability of its CISN process in commercial foundries, and predicts that the first availability of CMOS optical transceivers from its licensees will begin next year. IBM predicts that its CISN will then work its way from connecting systems to connecting boards in the same system, to connecting chips on the same board, to eventually connecting cores on the same CMOS microprocessor by 2016.